Hadronic algorithm firmware implementation and testbench for the Global Event Processor trigger subsystem for HL-LHC Upgrade at ATLAS~[TDAQ]

The Global Event Processor is a new FPGA-based trigger subsystem for the HL-LHC Upgrade of the ATLAS Experiment. We present our work in developing algorithm firmware, such as event-by-event calculation of the pile-up energy level, and testbench for the firmware. The use of High Level Synthesis (HLS) was explored to streamline the implementation of complex algorithms in firmware. A testbench was also developed, using python, for analysis and verification of the firmware algorithm implementation.