LHCb Upgrade: Periphery Electronics Processing Interface for the Upstream Tracker

The LHCb experiment at CERN performs world-leading flavor physics measurements. The forward detector features precise vertexing and tracking abilities and was capable of triggering at a rate of 1 MHz and collecting 1-2 fb$^{-1}$ of data per year during LHC Run 2. However, many results will benefit from much larger datasets that require a major upgrade of the detector. The upgrade will offer improved detection performance and will employ a 40 MHz trigger, resulting in more than 5 fb$^{-1}$ of data to be collected per year. This talk will give an overview of the upgrade of the silicon microstrip Upstream Tracker (UT), which accomplishes this 40 MHz readout by including up to 40 serial links per sensor running at 320 Mbps each. In particular, the talk will highlight the UT periphery electronics processing interface (PEPI). PEPI includes data concentrator boards (DCB) that serialize sensor data into 4.8 Gbps signals, optically send that data to central DAQ, and provide a reference clock for front-end readout electronics, and it includes backplanes that route the sensor data to the DCBs. These PEPI components, along with low voltage regulators (LVR) that provide power to PEPI and to staves with the sensors mounted on them, comprise UMD's contribution to the LHCb detector upgrade.