Advanced Simulation Technology to Design Etching Process on CMOS Devices
COFFEE_KLATCH · Invited
Abstract
Prediction and control of plasma-induced damage is needed to mass-produce high performance CMOS devices. In particular, side-wall (SW) etching with low damage is a key process for the next generation of MOSFETs and FinFETs. To predict and control the damage, we have developed a SiN etching simulation technique for CH$_{x}$F$_{y}$/Ar/O$_{2}$ plasma processes using a three-dimensional (3D) voxel model. This model includes new concepts for the gas transportation in the pattern, detailed surface reactions on the SiN reactive layer divided into several thin slabs and C-F polymer layer dependent on the H/N ratio, and use of ``smart voxels'' [1-2]. We successfully predicted the etching properties such as the etch rate, polymer layer thickness, and selectivity for Si, SiO$_{2}$, and SiN films along with process variations and demonstrated the 3D damage distribution time-dependently during SW etching on MOSFETs and FinFETs. We confirmed that a large amount of Si damage was caused in the source/drain region with the passage of time in spite of the existing SiO$_{2}$ layer of 15 nm in the over etch step and the Si fin having been directly damaged by a large amount of high energy H during the removal step of the parasitic fin spacer leading to Si fin damage to a depth of 14 to 18 nm. By analyzing the results of these simulations and our previous simulations [3-4], we found that it is important to carefully control the dose of high energy H, incident energy of H, polymer layer thickness, and over-etch time considering the effects of the pattern structure, chamber-wall condition, and wafer open area ratio. \\[4pt] In collaboration with Masanaga Fukasawa and Tetsuya Tatsumi, Sony Corporation. \\[4pt] [1] N. Kuboi \textit{et al}., Proc. Symp. Dry Process, 2014, p. 29.\\[0pt] [2] N. Kuboi \textit{et al}., presented at AVS 61$^{st}$ Int. Symp. {\&} Exhib., 2014, PS-TuM4.\\[0pt] [3] N. Kuboi \textit{et al}., Jpn. J. Appl. Phys. \textbf{49} (2010) 08JD01.\\[0pt] [4] N. Kuboi \textit{et al}., J. Vac. Sci. Technol. A\textbf{31} (2013) 061304.
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Authors
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Nobuyuki Kuboi
Sony Corporation