Contact-Less Electrical Characterization of Fully Depleted Silicon-on-Insulator

Ultra-thin (10 nm) silicon-on-insulator (SOI) has recently emerged as an important substrate, and at nominal doping levels of 10\^{}15 per cubic centimeter will be fully depleted of free carriers by interface states at the silicon-silicon dioxide interface[1]. Therefore, when imaged with contact-less characterization techniques such as electric force microscopy, one might expect the ultra-thin silicon layer to behave as if it has no free carriers. However, our electric force microscopy measurements show that the layer possesses sufficient free charge to have a 2D resistivity of at least 800 TOhm/square, and that the silicon layer behaves as a metal when charge is deposited on it [2, 3]. We believe that thermally activated charge hopping at silicon-silicon dioxide interface provides free carriers even when there are no free carriers from the silicon bulk. We discuss the implications of this conduction path to imaging of 10 nm SOI by electric force microscopy. Research supported by DOE and AFOSR. [1] S. Henaux, et al. J. Electrochem. Soc. 146, 2737 (1999), [2] Tevaarwerk, et al, Appl. Phys. Lett. 80, 4626 (2002) , [3] P. Zhang, et al, in preparation.