Gate control of single-electron spins: a multi-scale numerical simulation approach

Among recent proposals for next-generation, non-charge-based logic is the notion that a single electron can be trapped and its spin manipulated through the application of gate voltages (Rev. Mod. Phys. 79, 1217 (2007)). In this talk we present numerical simulations of such Spin Single Electron Transistors (SSET) in support of experimental work at the University at Albany, State University of New York aimed at the practical development of post-CMOS concepts and devices. We use a multi-scale simulation strategy to self-consistently solve the Schroedinger-Poisson equations (with and without exchange-correlation effects) to obtain realistic confining and gating potentials for realistic device geometries. We discuss scaling of the equations in the various sub domains of a finite-element discretization to span the dimensions from the micron scale of the gate structures down the single-electron level. We will discuss the calculation of the gate-tuned ``g-factor" for electrons and holes (Phys. Rev. B 68, 155330 (2003)) in electro-statically- and lithographically-defined quantum dots including the Rashba and Dresselhaus spin-orbit interactions computed numerically from realistic wave functions. This work is supported through funding from the DARPA/NRI INDEX center.