EPR Study of SiC Defects Related to N$_{2}$ and O$_{2}$ Annealing.

SiC is a promising replacement for Si in future high power, high temperature electronic devices. It is well known that the Si/SiO$_{2}$ interface in MOSFETs has electronically active defects, and recent work has shown the same is true for SiC. Our research focuses on identifying the cause and location of defects in thermally treated SiC substrates using EPR at 9.8 GHz. Samples underwent isochronal anneals from 400 to 1000 $^{o}$C in high purity dry ($<$0.9 ppm H$_{2}$O) N$_{2}$ or O$_{2}$. Room temperature EPR spectra showed two defects, defect A and defect B, with line-widths of 4G and 10G, respectively. The temperature dependence was similar for the N$_{2}$ and O$_{2}$ anneals until 800 $^{o}$C, when the concentration of defect A, which stayed constant in N$_{2}$, decreased in O$_{2}$. In both ambients defect B was eliminated, and it was determined that this defect was due to cutting. That the amount of defect A decreased during the O$_{2}$ anneals, but not during the N$_{2}$, suggests that oxidation, perhaps through etching, removes the signal. During the talk we will compare the results of oxidation and reactive ion etching studies, as these will give a better understanding of the location of defect A.