Process simulation of carbon-based nanostructures in next-generation semiconductor integrated elements
POSTER
Abstract
The trend in semiconductor devices leads us to develop new materials such as CNT and graphene from the point of high electric conductivity, new CMOS channel and interconnect, and low-voltage operation. To realize the carbon-based nano device, we have established HPCI carbon-based nano structure material consortium with industries, universities and institutions, aiming for R\&D of nano electric fabrication. Our research is oriented to process simulations of nano structure manufacturing for optimal process design, property analyses for comprehensive assessment of the device applications, and providing industry-friendly environment that combines first principles and other methods (semi-empirical and classical). To promote device manufacturing with the help of HPCI (K computer), PHASE is our key software for electronic structure calculations based on DFT using plane wave base, which is not only wide applicable to various materials, and involves analytical tools for dielectric response, vibrational analysis, STM simulation, etc. but also compatible to wide range of platforms from note PC to SC, with well optimized parallel computation. Some of applications will be presented together with the scalability on K computer such as SiC defects, graphene growth, and conductivity analysis
Authors
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Yasunari Zempo
Hosei University
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Takahisa Ohno
National Institute for Materials Science (NIMS), Computational Materials Science Unit, NIMS, Institute of Industrial Science, University of Tokyo, National Institute for Materials Science, University of Tokyo