Gate bias stress-induced threshold voltage instability of exfoliated multi-layer MoS$_{2}$ field effect transistors

Recently, MoS$_{2}$ has attracted great attention due to its intriguing electrical properties. MoS$_{2}$ transistors with a high on/off ratio of 10$^{8}$ have recently been demonstrated using HfO$_{2}$ as the top gate dielectric [1]. Despite the merits of MoS$_{2}$, large variations in the properties of MoS$_{2}$ FET devices due to extrinsic effects may result in limitations in device applications. Here, we investigated the gate bias stress effects of exfoliated multi-layered MoS$_{2}$ FETs. We observed that when a positive gate bias stress was applied to the device, the current decreased and the threshold shifted in the positive gate bias direction and vice versa. The electrical instability of the MoS$_{2}$ FETs was influenced by the measurement conditions. These phenomena can be explained by the charge trapping due to the adsorption or desorption of oxygen and/or water on the MoS$_{2}$ surface with a positive or negative gate bias, respectively, under an ambient environment. Our study will be helpful in understanding the electrical-stress-induced instability of the MoS$_{2}$-based electronic devices [2]. \\[4pt] [1] B. Radisavljevic et al., Nat. Nanotechnol. 6, 147(2011).\\[0pt] [2] K. Cho et al., ACS Nano, 7, 7751(2013).