Thermal Quantum Annealing on the D-Wave device

We report on new experimental results supporting previous work concluding that the D-Wave processor implements quantum annealing. We introduce techniques adopted to the D-Wave programmable annealer to correct for systematic fabrication and control errors. Correcting for systematic errors allows us to explore the behavior of the annealer at low energy scales, which were previously inaccessible. We describe the behavior of the annealer as we investigate the effect of thermal noise on the programmed Ising Hamiltonian. Thermal noise becomes dominant when we scale down the overall energy of the final-time Ising Hamiltonian, or increase the total annealing time. We found three qualitatively different thermal noise regimes; a high energy scale where ground state statistics dominates, a moderate noise regime regime where low lying excited states contribute, and a high thermal noise regime where the system dynamics are dominated by thermalization effects. The qualitative results are robust to increasing the size (number of qubits) of the benchmark Hamiltonian. We additionally investigated auto-correlations in the final state statistics.