Substrate removal near superconducting qubits and resonators in circuit QED processors

We investigate the effect of etching away substrate volumes in the capacitive gaps of transmon qubits and resonators in planar circuit QED quantum processors. We use cryogenic and deep reactive-ion etching techniques to control the etching depth, profile, wall roughness, and passivation chemistries in high-resistivity silicon substrates. Two independent etching steps allow freedom to choose which areas to etch using standard fluorine etch (i.e., feeds and readout resonators), and which volumes to deeply etch (i.e., capacitive gaps in transmons and bus resonators). We study the effects of different etching techniques on losses in superconducting resonators operating in the quantum regime and on relaxation times of transmon qubits.