Accumulation-Only Device Architecture for Si/SiGe Single Quantum Dots

Accumulation mode devices with overlapping gate architectures have been successfully realized in both Si/SiGe heterostructures [1] and Si MOS devices [2]. The increased control of tunneling rates, inter-dot tunnel couplings and confinement potentials over previous depletion mode designs make the overlapping gate architecture preferable. Material quality and device geometry have important implications for Si/SiGe quantum dots as potential hosts for spin qubits. Here we have fabricated and characterized quantum dot devices made with this accumulation mode architecture. We also perform numerical simulations to optimize device geometry for tight confinement potentials and reduced cross-coupling between accumulation gates. In addition to device improvements, we have also implemented a compact filtering system on the DC gate lines to achieve sub-40 mK electron temperatures.\\[4pt] [1] M. Borselli \textit{et al.}, arXiv:1408.0600v1\\[0pt] [2] M. Veldhorst \textit{et al.}, Nat. Nano. (2014), doi:10.1038/nnano.2014.216