The Effect of Gate -Bias Stress and Light illumination on the performance of ZnO Thin-Film Field Effect Transistors

We have investigated the stability of ZnO thin film field effect transistors (TFFETs) grown on Si/SiO2 under the application of positive gate bias stress and light illumination at room temperature. A gate voltage applied over a few seconds in ZnO TFFET devices is known to induce a positive shift in the threshold voltage as a consequence of charge trapping at or near the conducting channel / insulator interface. This bias stress remains unchanged even if a negative gate voltage stress is applied. A negative shift of the transfer curve for stressed devices was achieved while exposing the transistor to light in the presence of a small source voltage. The negative shift in threshold voltage depended on the photon energy and exposure time. Our experimental results indicate that the traps responsible for the stress are approximately 2.1 eV below the bottom of the ZnO conduction band with an energy distribution width of 3.40 eV. Stressed devices recovered their original characteristics with the photon energy of UV light (365 nm, 3.6 mW/cm2) at room temperature within 1818s. This approach could be used to reset stressed TFFETs using light sources.