Optimal Annealing Times on the D-Wave Processors

Benchmarking studies on the D-Wave quantum annealing processors have been inconclusive to date. The optimal annealing time, defined as the run-time at which the time-to-solution is minimized, has been outside the range of allowed annealing times on the devices. We construct a toy gadget that exhibits a non-monotonic behavior in its ground state probability as we increase the annealing time, and we use it to construct instances that exhibit an optimal annealing time in the available range of the device.