Hardware Considerations for High-connectivity Quantum Annealers

ORAL

Abstract

Quantum annealing is an optimization technique which could potentially make use of quantum tunneling to enhance performance. Existing quantum annealers implement pairwise interactions between qubits, with each qubit coupling to up to six others on a “Chimera” connectivity graph. This hardware graph can be used to embed complex optimization problems, but with significant overhead in energy scale and problem size. Here, we investigate an approach to designing quantum annealers with a higher degree of hardware connectivity. In particular, we discuss coupler chains and parallel couplers, the basic building blocks of a proposed coupler tree architecture.

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Presenters

  • Steven Weber

    MIT Lincoln Lab, MIT Lincoln Laboratory

Authors

  • Steven Weber

    MIT Lincoln Lab, MIT Lincoln Laboratory

  • Gabriel Samach

    Lincoln Laboratory, Massachusetts Institute of Technology, MIT Lincoln Lab, MIT Lincoln Laboratory

  • Danna Rosenberg

    MIT Lincoln Laboratory, MIT Lincoln Lab, Massachusetts Inst of Tech-MIT, Lincoln Laboratory, Massachusetts Inst of Tech-MIT

  • Jonilyn Yoder

    MIT Lincoln Laboratory, MIT Lincoln Lab, Lincoln Laboratory, Massachusetts Institute of Technology, Massachusetts Inst of Tech-MIT, Lincoln Laboratory, Massachusetts Inst of Tech-MIT

  • David Kim

    MIT Lincoln Laboratory, MIT Lincoln Lab, Lincoln Laboratory, Massachusetts Institute of Technology, Massachusetts Inst of Tech-MIT, Lincoln Laboratory, Massachusetts Inst of Tech-MIT

  • Andrew Kerman

    MIT Lincoln Laboratory, Massachusetts Inst of Tech-MIT, MIT Lincoln Lab

  • William Oliver

    MIT Lincoln Laboratory, MIT Lincoln Lab, Massachusetts Institute of Technology & MIT Lincoln Laboratory, Department of Physics, Research Laboratory of Electronics, Lincoln Laboratory, Massachusetts Institute of Technology, Massachusetts Inst of Tech-MIT, Department of Physics, Research Laboratory of Electronics, Lincoln Laboratory, Massachusetts Inst of Tech-MIT, MIT, Lincoln Laboratory, Research Laboratory of Electronics, and Department of Physics, Massachusetts Institute of Technology, Department of Physics, Research Laboratory of Electronics, Lincoln Laboratory, Massachusetts institute of Technology