Optimization and Planning Approaches for Low-level Hardware Compilation of Quantum Circuits

As prototypes of quantum processing units (QPU) mature, it becomes increasingly pressing to design approaches to maximize the performance of noisy devices running implementations of algorithms that can be benchmarked in the near-term. Minimizing the runtime of quantum circuits is particularly critical in early QPUs subject by decoherence which do not have resources for error correction. We show that the circuit compilation problem naturally maps to a planning problem similar to that encountered in automating operations of multiple agents that cooperatively need to achieve a goal. We demonstrate that state-of-the art Planning and Constraint Programming can effectively address the quantum circuit compilation problem. We applied our general compilation methods to the problem of compiling circuits related to the Quantum Alternating Operator Ansatz (QAOA), a prominent example of a quantum meta-heuristics, for simply structured optimization problems, such as MaxCut. Formulations of practical discrete optimization problems within QAOA framework results in circuits that are logically composed of a large number of commuting multi-qubit gates whose execution could be scheduled in a combinatorial number of ways. The architectural constraints of real-world QPUs, with available elementary gates manufactured in a planar nearest neighbor irregular graph layout and with each qubit individually calibrated to operate with different duration and fidelity. We exhibit efficient low-level compilation of QAOA circuits in this inhomogeneous, under-constrained setting, exemplified by the Rigetti, Google and IBM chips. We also discuss the general problem of quantum circuit compilation, taking into account additional constraints such as cross talk and additional algorithmic primitives such as measurement, in addition to optimizing the insertion of swap operations and accounting for different durations of synthesized logical gates.