Origins of interface traps in MoS₂-based field-effect transistors

Field-effect transistors utilizing few-layer MoS₂ as an n-type channel material were fabricated with both h-BN and Al₂O₃ as the gate dielectric layer. Whereas exfoliated h-BN is transferred directly to the MoS₂, growth of Al₂O₃ via atomic layer deposition (ALD) must be preceded by a nucleation seed layer of either oxidized aluminum (AlO_X) or silicon (SiO_X). Measurements of the density of interface traps (D_it) show marked differences in the behavior of each of the three types of fabricated devices. While h-BN exhibits close to acceptable values of D_it, the aluminum and silicon based ALD seed layers exhibit significantly increased D_it and Fermi-level pinning, respectively. In order to gain insight into the source of interface traps, atomistic models of the three relevant interfaces were constructed. Using density functional theory, we investigate the role that near-interface defects in the dielectric layer, dangling bonds, and accidental dopants in the MoS₂ from seed layer sputtering play in creating interfacial electron traps. These calculations are intended to provide guidance in materials selection and improvements to device processing during fabrication.