Material Targets and Challenges in Realizing Spintronics for Computing

Continued technology scaling of integrated circuits according to the Moore’s law may be achieved via gradual introduction of new materials and state variables [1]. In particular, for spin based computing and memory, novel materials and devices are essential to meet the demands of on chip memory as well as logic [2]. Over the past ten years invention of logic devices has occurred that are based upon spin transfer torque (all-spin logic - ASL, spin torque majority gate - STMG) or magneto-electric effect (magneto-electric majority gate – MEMG, spin wave device – SWD, and magneto-electric spin-orbit logic – MESO [3]). While the switching speed of spintronic logic devices is slower than CMOS devices, the switching energy is lower. Therefore spin logic can provide comparable computational throughput in power limited cases. Also its non-volatility has the potential to enable always-off, instantly-on computing. This drives the research for improved spin and magnetism in materials and interfaces. [1] Nikonov, D.E.; Young, I.A., "Benchmarking of Beyond-CMOS Exploratory Devices for Logic Integrated Circuits," in Exploratory Solid-State Computational Devices and Circuits, IEEE Journal on , vol.1, no., pp.3- 11, Dec. 2015. [2] S. Manipatruni, D. E. Nikonov, and I. A. Young, “Material Targets for Scaling All-Spin Logic”, Phys. Rev. Applied 5, 014002 (2016). [3] Manipatruni, Sasikanth, Dmitri E. Nikonov, and Ian A. Young. "Spin-orbit logic with magnetoelectric nodes: A scalable charge mediated nonvolatile spintronic logic." arXiv preprint arXiv:1512.05428 (2015).