Electrical Characterization of GaAs, Si and SrTiO3 Semiconductor Nanostructure Based Capacitors

We design and fabricate different capacitors with SrTiO3 nanopowder and GaAs and Si nanowires (NW) as dielectric materials. The effect of geometry and the type of semiconductor nanostructure on the total capacitance are investigated using electrical measurements. The vertically aligned 50 nm diameter GaAs NWs were grown using the Au catalyzed vapor-liquid-solid method. The Si NWs are randomly oriented with an average diameter of 70 nm. The SrTiO3 nano-particles are cubical with a width of around 30 nm. The capacitor Au plates are 300 nm thick and are fabricated using an electron beam deposition system on both solid glass and flexible poly(methyl methacrylate) (PMMA) substrate. The semiconductor based capacitors are composed of parallel arrays of GaAs NWs, as well as a random distribution of Si NWs and micrometer chunks of SrTiO3, lying on an Au coated substrate. Capacitance measurements on the Au plates with air as the dielectric spacer, reveal capacitance in the pF order. Capacitor structures with semiconductor dielectrics however show an enhancement of the total capacitance, mainly explained by the semiconductor spacer weakening the effective internal electric field and thus accumulating more charges on the capacitor plates.