Impact of Scratch Speed on Interface Adhesion of Thin Films

As we extend towards lower technology nodes (<14nm), low-k dielectric materials (k<2.7) are widely used to reduce the RC parasitic signal losses. One way to obtain this lower-k value is by the introduction of porosity to the material structure. However, these porous materials have reduced mechanical integrity and adhesion strength thus exhibits significant processing challenges. To measure the mechanical integrity of low-k thin films, we routinely utilize nanoindentation to determine mechanical properties such as hardness and modulus. To measure adhesion failure, a Four Point Bend Test (FPBT) is utilized to determine the strain energy release rate. However, the FPBT is time-consuming and can introduce variability in results from sample preparation. Hence, we propose the Nanoscratch (NST) that exhibits tremendous potential for reducing the time needed to measure the thin film adhesion properties. We have observed that the NST does not require extensive sample preparation and thus eliminates the variability factor arising from sample preparation. In this study, we employ a ramped load NST using a conical probe equipped with a standard transducer. The effect of scratch speed on the Critical Nanoscratch Load is studied to understand the adhesion failure of the low-k thin films.