Van Der Waals Heterostructure of Insulator/Topological Insulator/Insulator for Dual-Gated Quantum Capacitance

Three-dimensional topological insulator (3D TI) with two important signatures, namely Dirac cone-like surface states and non-degenerate momentum-locked spin is an ideal system for fundamental physics studies. Quantum transport of 3D TI shows the integer quantum Hall effect arising from the addition of the top and bottom surface states. This yields the interesting ν=±1 (dissipationless) and ν=0 (dissipative) quantum states. As the top and bottom surface states are always coupled to each other, independent gate tuning on both surfaces are highly desirable to fully understand the quantum Hall states in 3D TI. In this work, I will discuss the different approaches in making the dual-gated BiSbTeSe₂ (BSTS) devices by van der Waals stacking in a sequent of insulator/3D TI/insulator. Such a device configuration can also be treated as a series of plate capacitors formed between the top (bottom)-gate electrodes and top (bottom) surface states. I will also present the recent progress on quantum capacitance measurement for our dual-gated BSTS devices.