Patterning and stacking for batch fabrication of transistor arrays using two dimensional materials.
ORAL
Abstract
Building integrated circuits is the basis of modern electronics and optoelectronics. Conventional device fabrication processes involve patterning with polymer based lithography, deposition, and etching of thin film materials. They introduce surface contamination or damage and are not ideal for atomically-thin, all-surface materials such as graphene and transition metal dichalcogenides (TMDs). Here, we report a new approach for building integrated circuits using TMDs under ambient condition without using conventional lithography, metal deposition or etching. A 532-nm pulsed laser beam is used to achieve wafer-scale, resist-free patterns of TMDs. The scalability and reliability of such process is demonstrated by fabricating an array of field effect transistors (FETs). The devices are generated by patterning semiconducting TMDs (e.g. MoS2, MoSe2) for channels and aligned transfer of metal structures, also patterned using our laser beam, for electrodes and interconnects. Our devices show improved hysteresis compared to conventional lithography-based FETs. Our work provides a general method for wafer-scale device fabrication using surface sensitive materials while maintaining their intrinsic properties and could be useful for realization of high performance atomically-thin circuitry.
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Presenters
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Preeti Poddar
University of Chicago
Authors
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Preeti Poddar
University of Chicago
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Saien Xie
University of Chicago
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Andrew Mannix
University of Chicago
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Kibum Kang
University of Chicago
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Jiwoong Park
University of Chicago, Chemistry, University of Chicago, Cornell Univ, Department of Chemistry, Institute for Molecular Engineering, and James Franck Institute, University of Chicago