Impact of Si:P Delta-layer Quality on the Electrical Transport of Si:P STM Patterned Devices

Phosphorus delta-doped silicon (Si:P) monolayers are a novel nanoscale system which can be patterned with atom-scale precision and feature unprecedented high carrier densities. Enabled by advanced hydrogen lithography techniques and low-temperature encapsulation overgrowth, patterned Si:P monolayers have become a valuable testbed for prototype Si quantum computing devices and novel atomically engineered superlattices. In this presentation, we investigate the effect of and interplay between dopant confinement, epitaxial Si overgrowth quality, and efficiency of STM patterning. We study the impact of these properties on coherent transport in the Si:P 2-D system using weak localization. We use lithographically patterned delta layers and STM-patterned Si:P nanometer-scale devices, such as low dimensional, atomically abrupt wires and tunnel junctions, as sensitive probes to characterize the Si:P material system, noise, and transport properties. Specifically, we vary the dopant density and encapsulation conditions of the Si:P system and present a detailed analysis of their effect on low temperature, electrical transport properties at the atomic scale.