Enablement of near-term quantum processors by architectural yield engineering

Scaling of near-term quantum processors depends on complex architectures where maintaining low gate error rates relies on utilizing the highest coherence times available. In the case of fixed-frequency transmon qubits coupled via cross-resonance gates, multi-qubit operation is feasible as long as the excitation energies of neighboring qubits are similar but non-degenerate. Meeting this condition consistently in a large lattice of qubits requires precise Josephson junction fabrication and accurate frequency forecasting. In this talk, we will compare measured qubit frequencies to resistance measurements of Josephson junctions, and use a statistical model to suggest strategies for useful device yields at the 50 qubit and larger scale.