Yield Analysis of Superconducting Qubit Fabrication in KRISS

POSTER

Abstract

In order to achieve scalable quantum circuits, large-scale qubit fabrication capability is essential. We have been working on superconducting transmon qubits, and in this study we will present our process' yield analysis on our wafer-scale qubit fabriation. Our qubit fabrication uses 3 inch wafers, either sapphire or silicon, and tunnel junctions are made by two-angle evaporation using the Dolan bridge. We checked the tunnel resistances on the wafer at room temperature and we typically get 5 to 6 % standard deviation across the wafer. For targeting, we usually get resistance within 10 % of the target value. We also have a couple of outliers on the wafer, typically less than 5 out of ~100 junctions, in which we need improvements. There are many control parameters to improve the yield and spread, so in the end we will discuss the substrate cleaning, e-beam patterning, deposition and oxidation conditions, which are to be controlled tightly in order to get a robust large scale fabrication process of the Josephson junctions.

Presenters

  • Gwanyeol Park

    Korea University Sejong Campus & KRISS

Authors

  • Gwanyeol Park

    Korea University Sejong Campus & KRISS

  • Jiman Choi

    University of Science and Technology (UST) & KRISS

  • Gahyun Choi

    Ulsan National Institute of Science and Technology (UNIST)

  • Soon-Gul Lee

    Korea University Sejong Campus

  • Kibog Park

    Ulsan National Institute of Science and Technology (UNIST), Ulsan National Institute of Science and Technology

  • Woon Song

    Korea Research Institute of Standards and Science (KRISS)

  • Yonuk Chong

    Korea Research Institute of Standards and Science (KRISS) & UST