Design of a Cryogenic, Digital Measurement Circuit for Superconducting Qubits

As superconducting quantum processors increase in size and complexity, the scalability of standard techniques for qubit control and readout becomes a limiting factor. One vision for a scalable architecture leverages cryogenic, classical control and readout circuitry based on the SFQ (Single Flux Quantum) logic family. Conventional heterodyne readout uses a quantum-limited cryogenic amplifier chain and requires bulky microwave components with multiple rf lines and pump signals, with the result accessible in software at room temperature. An alternative method involves mapping the qubit state onto the photon occupation in a microwave cavity, followed by photon detection using a Josephson Photomultiplier (JPM). The result is stored as a classical circulating current. To convert this current to digital logic, a ballistic Josephson Transmission Line (JTL) can be inductively coupled to the JPM. Fluxons in the JTL are delayed depending on the circulating current in the JPM. A delay detection circuit converts arrival time to a logical 1 or 0. This digital result can then be used by a proximal classical coprocessor performing quantum error detection. Simulations and experimental results with this measurement technique will be discussed.