Disjointness in quantum error correction: Imposing limitations on logical gates

Invited

Abstract

I will introduce the notion of disjointness for stabilizer codes in quantum error correction and discuss its implications for implementing fault-tolerant logical gates. The disjointness, an algebraic quantity, can be used to characterize which level of the Clifford hierarchy is naturally attainable by simple fault-tolerant logical gates such as constant-depth circuits. While the results are applicable to any stabilizer code, when addressing topological code families one can reproduce known bounds on the level of the hierarchy attainable by constant depth circuits, with the addition that the circuits are unconstrained by geometric locality. For instance, symmetric 2D surface codes cannot have non-local constant depth circuits resulting in non-Clifford logical gates.

Presenters

  • Tomas Jochym-O'Connor

    Caltech

Authors

  • Tomas Jochym-O'Connor

    Caltech

  • Theodore Yoder

    Research, IBM TJ Watson, IBM

  • Aleksander M Kubica

    Perimeter Institute for Theoretical Physics, Perimeter Institute