Ultra-stable atomically precise single electron transistors in Silicon

Single electron transistor devices (SETs) in solid-state quantum computing architecture serve as sensitive electrometers for realizing spin selective initialization & single shot readout during spin manipulation, & demand very stable operation. In this context, we demonstrate fully functional, ultra-stable atomically precise SETs fabricated using scanning tunneling microscope (STM) lithography on the Si (100) 2x1: H surface. Low-temperature transport measurement of SETs reveal highly stable Coulomb blockade oscillations. To better understand low-frequency time instabilities we have measured charge offset drift over a period of 4.5 days. SETs fabricated using STM lithography exhibit low charge offset drift magnitude (less than 0.02 e over 4 days, at both base temperature & 6 K) as compared to conventional metal & Silicon based SETs. The low charge offset drift magnitude likely results from the lack of a nearby interface & suggests low defect density in the STM fabrication process & low temperature epitaxial overgrowth. However, at elevated temperatures above 3 K a glassy relaxation is observed in response to gate voltage changes with a settling time that is strongly temperature- dependent.