Crossbar architecture with individually addressable single electron transistors

Achieving sublinear scaling of interconnects between room temperature equipment and cryogenic hardware is essential in engineering a practical spin based quantum computer. This requirement is equally present in high throughput characterization for the device fabrication-measurement cycle. In addition to cryogenic multiplexing, the lines into the cryostat can be further reduced at the qubit plane. Here, a sparse crossbar architecture of single electron transistors (SETs) is presented, allowing for the formation of a quadratic number of unique SETs with linearly increasing control lines. We show experimental effort toward realizing crossbars which are operated using a CMOS multiplexer consisting of commercial components at 50 mK capable of supporting up to 648 SETs. These structures provide insight into shared control, enable statistical characterization of substrate uniformity and serve as a platform for device design optimization. Furthermore, by evolving the unit cell, such structures can act as stepping-stones towards proposed fully-coupled crossbar qubit architectures and integration of cryogenic electronics.