Silicon quantum dot fabrication with subtractive processing

ORAL

Abstract

The overlapping aluminum gate design for silicon quantum dot qubits has shown success in the formation of one and two qubit systems. However, charge noise and device consistency are still major points of concern for silicon quantum systems. Here, we present an alternative approach to silicon quantum dot fabrication, utilizing negative-tone e-beam lithography and subtractive processing to replicate the typical three-layer aluminum gate structure with two layers of palladium gates. Using high-precision HSQ e-beam resist, all plunger, barrier/tunnel, and accumulation gates can be fabricated as a single layer. This eliminates overlay issues and ensures barrier gates, typically written as the third layer, have large action on the dots. The self-oxidation of the three aluminum gate layers is replaced with a single layer of deposited dielectric. Progress towards the realization of a well-controlled, lower noise quantum dot system using etched palladium gates will be presented.

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Presenters

  • Thomas McJunkin

    University of Wisconsin - Madison, Department of Physics, University of Wisconsin-Madison, Madison, WI 53706, USA

Authors

  • Thomas McJunkin

    University of Wisconsin - Madison, Department of Physics, University of Wisconsin-Madison, Madison, WI 53706, USA

  • Evan R MacQuarrie

    University of Wisconsin - Madison, Department of Physics, University of Wisconsin-Madison, Madison WI, USA, Department of Physics, University of Wisconsin-Madison, Madison, WI 53706, USA

  • Mark Alan Eriksson

    University of Wisconsin - Madison, Physics, University of Wisconsin - Madison, Madison, WI USA, Department of Physics, University of Wisconsin-Madison, Madison WI, USA, Department of Physics, University of Wisconsin-Madison, Madison, WI 53706, USA, University of Wisconsin-Madison