Attainment of SS < 10 mV/dec at 4 K in in-situ passivated planar bulk GaAs MOSFETs: alternative cryogenic electronics

Cryogenic readout and control are on-demand for scalable and high-performance quantum computers. InGaAs high-electron-mobility transistors (HEMTs) and Si complementary metal-oxide-semiconductors (CMOS) are now two competing technologies for cryogenic electronics. Nevertheless, the power consumption limit is a significant challenge for realizing effective cryogenic electronics. GaAs MOS field-effect transistors (MOSFETs) provide lower gate leakage than HEMTs because of the MOS structure, and higher electron mobility and narrower band tails, compared to Si. These make GaAs MOSFETs a potential candidate to achieve lower subthreshold slope (SS) values and power consumption.

The SS of in-situ passivated GaAs MOSFETs is ~ 60 mV/dec at 300 K, and decreases to 19 mV/dec at 77 K. These SS are smaller than what was reported in ex-situ passivated (In)GaAs MOSFETs with similar device configuration and are approaching the thermal limit of SS at the respective temperatures. As the temperature goes below 77 K, there is a saturation of the SS, which reaches 9 mV/dec at 4 K. This SS is lower than what is commonly observed in Si MOS and conventional InGaAs HEMT (~11 mV/dec). The low SS in GaAs MOSFETs is essential for ultra-low power consumption, high power-to-gain efficiency, and low-noise performance, therefore making them a strong candidate for cryogenic electronics.