On the variability of fin-shaped silicon spin qubit with multi-gate: effect of gate work function variation

A multi-gate quantum dot structure is expected as a Si spin qubit in integrated qubit arrays. In multi-gate devices, potential valleys and barriers are electrostatically formed near the Si surface by biases applied to the gates, and precise control of the potential profile is essential for qubit operation with high fidelity. Here, work function variation (WFV) of the gates, which is one of factors to cause variability in conventional MOSFETs, could be an inhibiting factor also to aiming at higher qubit fidelity. Therefore, in this study, we investigated the influence of WFV based on 3D device simulation (HyENEXSS^TM) at 300K, subjecting to a fin-shaped single quantum dot device. The device consists of a p-type body and n+-type source/drain, with one plunger gate (PG), two barrier gates (BG), and two accumulation gates (AG). We particularly focused on the threshold voltage (Vth) in a characteristic of source-to-drain current controlled by PG bias (Ids-Vpg) as a standard of the bias, following to the well-established manner in conventional MOSFET. We found that Vth of Ids-Vpg is shifted due to the WFV of not only PG but also BG. It means that WFV of surrounding gates, i.e., gates not targeted for operation, also influences. On the other hand, it is clarified that the level of conduction band edge just beneath PG does not vary when Vpg is set to be Vth, although the Vth value itself is shifted due to the WFM of BG. This also suggests that the concept of Vth is available to examine the performance variability of multi-gate Si qubits.