Fast event distribution over a HW-parametric large-scale control system, Part 1

At the nanosecond timescale, superconducting qubits represent one of the quantum computing technologies with the fastest gate times. Consequently, the sequencing of classical instructions to interact with the quantum processing unit (QPU) should be handled at comparable speeds. Common sequences involving active reset of qubits or syndrome extraction for Quantum Error Correction (QEC) require feedback within the control system between readout and signal generation modules; ideally as fast as possible to optimize the number of operations to be applied to the QPU. When scaling the number of qubits, the control logic is spread across different physical entities of a highly distributed system which poses major challenges to maintaining synchronization across channels and delivering the feedback at low latencies.

We describe a system architecture to enable fast and accurate active reset, syndrome extraction and error correction on a 100+ SC qubit quantum computer. We present our solutions for efficient clock synchronization; low-latency event distribution and dedicated data channels aiming to fulfill the requirements of the next generations of quantum computers.