Stressing Out Modern Quantum Hardware: Performance Evaluation and Insights
ORAL
Abstract
Quantum hardware is progressing at a rapid pace and, alongside this progression, it is vital to challenge the
capabilities of these machines using functionally complex algorithms. Doing so provides direct insights into the
current capabilities of modern quantum hardware and where its breaking points lie. Stress testing is a technique
used to evaluate a system by giving it a computational load beyond its specified thresholds and identifying the
capacity under which it fails. We conduct a qualitative and quantitative evaluation of Quantinuum’s H1 ion-trap
device using a stress test-based protocol. Specifically, we utilize the quantum machine learning (QML) algorithm,
the Quantum Neuron Born Machine, as the computationally intensive load for the device. Then, we linearly
scale the number of repeat-until-success sub-routines within the algorithm to determine the load under which the
hardware fails and where the failure occurred within the quantum stack. Using this proposed method, we (a) assess
the hardware’s capacity to manage a computationally intensive QML algorithm and (b) evaluate the hardware
performance as the functional complexity of the algorithm is scaled. Alongside the quantitative performance
results, we provide a qualitative discussion based on the insights obtained from conducting the stress test with
the QNBM - i.e. we put forth the specific roadblocks that appear throughout the quantum computing stack when
scaling the functional complexity of the algorithm.
capabilities of these machines using functionally complex algorithms. Doing so provides direct insights into the
current capabilities of modern quantum hardware and where its breaking points lie. Stress testing is a technique
used to evaluate a system by giving it a computational load beyond its specified thresholds and identifying the
capacity under which it fails. We conduct a qualitative and quantitative evaluation of Quantinuum’s H1 ion-trap
device using a stress test-based protocol. Specifically, we utilize the quantum machine learning (QML) algorithm,
the Quantum Neuron Born Machine, as the computationally intensive load for the device. Then, we linearly
scale the number of repeat-until-success sub-routines within the algorithm to determine the load under which the
hardware fails and where the failure occurred within the quantum stack. Using this proposed method, we (a) assess
the hardware’s capacity to manage a computationally intensive QML algorithm and (b) evaluate the hardware
performance as the functional complexity of the algorithm is scaled. Alongside the quantitative performance
results, we provide a qualitative discussion based on the insights obtained from conducting the stress test with
the QNBM - i.e. we put forth the specific roadblocks that appear throughout the quantum computing stack when
scaling the functional complexity of the algorithm.
* AUS would like to acknowledge Agnostiq Inc, Aspirant Ventures, Atmos Ventures, the CUbit QuantumInitiative, EeroQ, Multiverse Computing, the Quantum Computing Report, The Center for Computationand Technology at Louisiana State University, and Rigetti for financial support. Additionally, manythanks to Denise Ruffner and the Women in Quantum donors for providing support for AUS.
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Publication: A. U. Siddiqui, K. M. Gili, C. Ballance, "Stressing Out Modern Quantum Hardware: Performance Evaluation and Insights" [manuscript in progress]
Presenters
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Aliza U Siddiqui
University of Colorado Boulder
Authors
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Aliza U Siddiqui
University of Colorado Boulder
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Kaitlin M Gili
University of Oxford
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Chris J Ballance
University of Oxford