A graph-based embedding of dynamical decoupling for quantum computing

Dynamical decoupling (DD) is a key error suppression technique for quantum computing. Ideally, DD suppresses both single-qubit phase errors and unwanted crosstalk between coupled qubits during idle delays. The precise timing of the DD gates or pulses affects the efficiency of error-suppression and ultimately the circuit fidelity. Here, we present an automated and efficient method for determining an embedding of DD to suppress phase and cross talk errors for an arbitrary input circuit. Our method relies on representing the DD embedding task as a graph, and using the structure and properties of the graph to determine an order in which each idle delay should be addressed. This ordering allows optimal DD embeddings to be found analytically (without using numerical optimization). Our procedure finds a tailored DD scheme that refocuses all quasi-static ZI and ZZ error terms, up to minor unavoidable rounding errors due to device timing constraints. Moreover, the protocol uses a small number of gates compared to alternative techniques. Our method provides a clear boost to overall empirical algorithmic success probability compared to other DD embedding schemes. We present the DD embedding algorithm as well as side-by-side empirical tests with other known DD embedding schemes.