Mechanism of high-temperature quantum dot operation in isoelectronic-trap-assisted tunnel FETs

ORAL

Abstract

Silicon spin qubit is one of the promising candidates as a building block of quantum computers. Recently, Si tunnel-FET (TFET)-type qubits have successfully operated at high temperatures up to 10 K, which employs the electronic state of the isoelectronic trap (IET) impurity as a quantum dot. To investigate the mechanism of their high-temperature operation, as a first step, we develop a device simulator reproducing their single-electron transistor (SET) operation. In this presentation, we report the device simulation clarifying the high-temperature SET operation mechanism.

This device operates as a SET with tunneling between the source and drain intermediated with the IET state. Firstly, short gate length must be employed such that tunneling distances are sufficiently short. Secondly, the quantum dot should be located far from the source and drain, to avoid Coulomb repulsion between a charged quantum dot and surrounding electrons hindering the charge up of the quantum dot. This requirement becomes stricter at high temperatures because the number of surrounding electrons increases. Thirdly, the localized IET state is preferred to produce a small quantum dot. This causes a deep potential distribution when the quantum dot is charged up, resulting in large charging energy. Satisfying these three requirements enables high-temperature SET operation of the devices.

* This work was supported by JST CREST Grant No. JPMJCR1871, and MEXT Quantum Leap Flagship Program (Q-LEAP) Grant No. JPMXS0118069228, Japan.

Presenters

  • Shota Iizuka

    AIST

Authors

  • Shota Iizuka

    AIST

  • Hidehiro Asai

    AIST

  • Kimihiko Kato

    AIST

  • Hiroshi Oka

    AIST

  • Junichi Hattori

    AIST

  • Koichi Fukuda

    AIST

  • Takahiro Mori

    AIST