On-chip photonic convolution in the fractional Fourier domain

An integrated and programmable photonic circuit architecture to perform a modified-convolution operation based on the Discrete Fractional Fourier Transform (DFrFT) is introduced. The latter is shown to be achieved in an on-chip platform by utilizing two nonuniformly spaced waveguide arrays of different lengths so that the DFrFT and inverse DFrFT operations are performed. The convolution kernel is implemented by programming phase shifters that modulate both amplitude and phase in an MZI array.



Numerical results demonstrate that the proposed device is capable of performing customary convolutional tasks such as signal smoothing and edge detection, even in the presence of noisy signals, which are further improved by performing even and odd pooling operations. Notably, the deliberate introduction of random defects into the lattice does not jeopardize the functionality of the proposed convolution device, showing its resilience to manufacturing errors. For completeness, full-wave simulations of pertinent designs based on conventional silicon photonics processes at the telecommunication wavelength are presented.