Cryogenic radiation-hard fully-depleted silicon-on-insulator field-effect transistors

The radiation-hard transistors for space electronics need to operate at low temperatures and under irradiation by charged particles, x-rays, and gamma rays [1]. Fully-depleted silicon-on-insulator (FD-SOI) technologies, thanks to the small field-effect transistor (FET) volume, superior electrostatics, undoped channel, and threshold voltage V_TH adjustability with back-biasing (BB), are more suitable for radiation hardness and low-temperature operations as compared to bulk CMOS FETs [2].

In this work, we irradiated our custom FD-SOI FETs [3] with 7.5 MeV protons for the total irradiation dose of 30 Mrad(Si), at the radiation-hard technology threshold [1]. Studying transfer/output characteristics and low-frequency current noise of irradiated FETs with different dimensions, we observed that introduced defects and impact of irradiation, which degrades FET's electrostatics, e.g. in terms of subthreshold swing and V_TH, can be effectively mitigated through reverse BB (pushing the channel toward the top Si/SiO₂ interface) from 293 K down to 4 K.

In summary, we demonstrate that our FD-SOI technology is a promising candidate for room temperature and cryogenic radiation-hard applications.

[1] IEEE Trans Nucl Sci, vol. 34, no.6, pp.1621-1628 (1987).

[2] IEEE Int. SOI Conf., Tempe, AZ, USA, pp.1-2 (2011).

[3] arXiv:2208.12131 (2022).