Fast Full-Device Characterization and Gate Calibration with a Graph-Based Scheduler

ORAL

Abstract

Reliable calibration of all quantum operations is crucial in obtaining the best device performance limited only by the qubit coherences. Traditionally, calibration is done using slow, resource-intensive model-based experiments executed in a manual or semi-automated operation requiring expert supervision. Due to the inadequacy of the device models for fast gates, the above procedure is often unable to achieve the best device performance.

This talk presents a system-wide tune-up approach for quantum devices. We enable fully autonomous bring-up from a cold start by leveraging AI tools that directly interact with the hardware and control technology. We developed a graph-based scheduler that seamlessly combines parallelized device characterization and gate calibration. Our protocol bootstraps the noisy device parameters obtained from coarse model-based device characterization with model-free agents to realize optimal gates. This enables us to reduce the number of measurements by over 10x compared to the standard scripted multi-dimensional scans. We experimentally demonstrate complete device tune-up, quickly obtaining high-fidelity gate and measurement waveforms compared to slower traditional calibration methods. Subsequent benchmarking verifies that the device operation fidelity is coherence limited.

Our framework provides a practical and scalable solution for calibration and optimization of quantum devices, paving the way towards the realization of large-scale quantum computers.

Presenters

  • Ayush M Pancholy

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Authors

  • Ayush M Pancholy

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  • Aaron Barbosa

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  • Varun Menon

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  • Shobhan Kulshreshtha

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  • Yuval Baum

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  • Pranav S Mundada

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  • Marti Vives

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