Spin Qubits with Integrated millikelvin CMOS Control

A key virtue of spin qubits is their tiny submicron footprint, enabling billions of qubits to fit on a single silicon wafer. With each qubit requiring a handful of gate electrodes for control, however, a formidable challenge arises in the management of this extreme interconnect density. Monolithic integration of qubits with CMOS-based control circuits can potentially address this challenge, although the impact of heat and crosstalk on the qubits is likely to pose a significant risk to this approach. An alternate architecture¹ leverages heterogeneous ‘chiplet’ style packaging in which the control circuits and qubits are proximal, but positioned on separate dies and wired-up using dense, lithographically defined interconnects at milli-kelvin temperatures. Here, we report the realization of a cryo-CMOS control architecture (based on 28 nm FDSOI) and benchmark its performance using silicon MOS-style electron spin qubits². The fidelity of both single- and two-qubit gate operations acts to probe the impact of heat and noise arising from the cryo-CMOS control circuits. These results suggest that heterogeneous integration is a viable means of scaling-up the control interface of spin-based quantum processors.

1. Pauka, S.J., Das, K., Kalra, R. et al. A cryogenic CMOS chip for generating control signals for multiple qubits. Nat Electron 4, 64–70 (2021). https://doi.org/10.1038/s41928-020-00528-y

2. Veldhorst, M., Yang, C., Hwang, J. et al. A two-qubit logic gate in silicon. Nature 526, 410–414 (2015). https://doi.org/10.1038/nature15263