Tunnel and capacitive coupling optimization in FDSOI spin-qubit devices

The possibility to form well defined and long lived spin qubit in silicon as well as their compatibility with industrial CMOS technology have made them an attractive choice for building a large scale quantum computer. Within dense arrays of quantum dots (QDs), precise fine-tuning and accurate determination of operating conditions will be imperative for each individual spin qubit.

Here we present the ongoing development to improve the sturdiness of individual spin qubits within a scalable design. We aim to suppress the diagonal coupling in pseudo-2D array structures compared with the longitudinal and transverse couplings for a proper device operability. To this end, we introduced new QDs array designs and developed dedicated gate/active module accordingly. Higher yield was achieved through process optimization of the two-level intertwined gates structures. Finally, low temperature characterization of the proposed structures show wide tunability of the tunnel coupling.