Low-overhead quantum processor using concatenated bosonic-LDPC codes
ORAL
Abstract
qLDPC (Quantum Low Density Parity Check) codes offer a way to drastically reduce the number of physical qubits for a given number of logical qubits and a targeted logical error rate compared to the more studied surface code. However, implementing these codes requires more advanced hardware especially in terms of qubit connectivity. In this talk, we study LDPC codes for biased-noise qubits and how their implementation compares to the hardware requirements of LDPC codes for standard qubits.
* Plan France 2030 through the project NISQ2LSQ ANR-22-PETQ-0006
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Publication: To be published
Presenters
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Diego Ruiz
Alice&Bob - Inria, Alice&Bob - INRIA
Authors
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Diego Ruiz
Alice&Bob - Inria, Alice&Bob - INRIA
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Anthony Leverrier
Inria Paris
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Jérémie Guillaud
Alice&Bob
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Mazyar Mirrahimi
Laboratoire de Physique de l'Ecole normale supérieure, ENS-PSL, INRIA, Inria Paris
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Christophe Vuillot
Université de Lorraine, CNRS, Inria, LORIA