Tradeoffs and Tensions in R&D: From Facilities to Programs

Just as the design of an integrated circuit requires balancing constraints on power, performance, area, and cost, so the development of a national research strategy for microelectronics also involves an optimization in a complex parameter space. Tradeoffs and compromises are required at all levels. For example, there is an inherent tension between the desire to accommodate new materials and designs in a fabrication facility and the need to achieve stable and reproducible processes that can generate statistically meaningful data. Analogously, there is a need to balance the breadth of an R&D portfolio against its focus to ensure that new opportunities are captured whilst achieving critical mass on the most promising. Similar considerations apply to all dimensions of the microelectronics R&D enterprise and are reflected in documents as diverse as the Draft National Strategy on Microelectronics Research and the CHIPS Incentives Program funding opportunity announcements. I will discuss these considerations from a perspective informed by my experience in industry, national labs, and government.