Effect of Temperature on Surface Recombination Current at SiO$_{2}$/Si Interface Traps

Temperature dependences of recombination current at interface traps in MOS transistor structure are investigated using the Shockley-Read-Hall DC recombination-current-voltage (R-DCIV) characteristics. Results include the effects of energy distribution of the interface traps (discrete, constant and U-shaped energy distributions) on the temperature dependences of the base-terminal-current-versus-gate-voltage lineshape (I$_{B}$-V$_{GB})$, peak current and voltage (I$_{B-peak,}$ V$_{GB-peak})$ and their thermal activation energy E$_{A}$, and the reciprocal slope n of the I$_{B-peak}$ versus base/drain (or base/source) p/n junction forward voltage V$_{BD}$. Surface impurity concentration and oxide thickness are varied. Temperature dependences of E$_{A}$, V$_{GB-peak}$ and n are small while I$_{B-peak}$ and R-DCIV linewidth, large. The insensitivity of I$_{B-peak}$ and n on material properties allows experimental extraction of effective interface trap energy distribution.