AFM and LEED of Hybrid Si-based Graphene Interface Nanostructures

A multi-method approach is described that is being used to create new hybrid nano-scale graphene electronic structures compatible with Si-based technology. Our design uses nanostructured SiC-template graphene channels and high-K dielectrics for RF applications. This method is based on the well-known high temperature annealing procedure that converts SiC into thin layers of graphite called graphene. Initial Atomic Force Microscopy (AFM) measurements of epitaxial SiC on Si(100) and Si(111) shows narrow domains of $\sim $150 nm dimension that have an Auger electron Spectroscopy signature confirming the formation of graphene on the SiC surface. Low Energy Electron Diffraction (LEED) also confirms the well-known pattern of graphene reported earlier by several groups. We find that the conversion temperature appears to be somewhat lower ($\sim $ 1000 -- 1080 C) for these thin films of SiC than for bulk SiC (0001) surfaces which is possibly due to surface dislocations formed during the epitaxial growth process. Additional experiments using Photoelectron Emission Microscopy (PEEM) are in progress that appear to confirm the results found by AFM and give further details of the conversion process on a $\sim $ 10 -- 1000 nm scale.