Fault-tolerant logical state construction using cavity-QED network
ORAL
Abstract
The exploration of an efficient and scalable architecture of fault-tolerant quantum computing (FTQC) is among the most important keys to the demonstration of useful quantum computing. In this presentation, we show the performance of a scalable quantum memory based on surface code using a cavity network system, each cavity including neutral atoms as data qubits. In particular, we estimate the requirement of cavity-QED parameters for FTQC regarding several cavity network structures. Our stabilizer simulation that treats photon loss error in a special way shows the improvement of the threshold value compared to using the straightforward minimum-weight perfect matching algorithm. The performance of the communication between the memories will be also discussed.
*This work is supported by PRESTO, JST, Grant No. JPMJPR1916; CREST, JST, Grant No. JPMJCR1771; Moonshot R&D, JST, Grant No. JPMJMS2061 and JPMJMS2268.
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Presenters
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Rui Asaoka
- NTT corporation