Accelerating Quantum Algorithms: A Hardware-Software Co-Design for Efficient Parameterized Circuit Execution

Classical computation is vital in controlling and dictating the execution efficiency of quantum algorithms. A majority of classical computing time is spent decomposing quantum circuits into physical pulses. However, these circuits with different quantum logical operations exhibit a pattern of structural similarity, where the physical pulses differ by changes in virtual phases. In this work, we identify these structural similarities and accelerate quantum algorithm execution through a hardware-software co-design.

Our approach, RIP and Stitch with Deft Scheduler, comprises software and hardware components. The software can identify structural equivalency in a batch of circuits, peel the circuit parameters, and selectively compile unique circuits. The hardware on the FPGA stitch backs the peeled circuit parameters to the appropriate circuit, with assistance from the Deft Scheduler, to generate physical pulses for the QPU. This approach accelerates the quantum algorithm execution and demonstrates speed-ups of 3x-7x on different algorithms.