Embedding Non-Local Quantum Error Correcting Codes in Multilayer Superconducting Qubit Hardware

Quantum error correcting codes (QECCs) with encoding rates higher than the surface code cannot be locally embedded in 2D [1, 2]. While placing and routing the connections of such codes on multilayer superconducting qubit hardware is in principle possible, minimizing metrics like the number of routing layers, and wire length becomes a non-trivial optimization task. Guided by specific fabrication constraints, we partition the QECC place-and-route task into a series of graph-theoretic problems, such as maximal-planar subgraph, orthogonal drawing and shortest path routing. We apply established heuristic algorithms to find approximately optimal embeddings and benchmark their feasibility on superconducting hardware. We investigate the performance of our heuristic solver through a comparative analysis of test QECCs with varying connectivity. As an increasing number of non-local, high-rate QECCs are discovered, our hardware-aware, computational approach to the place-and-route problem may accelerate the development of novel codes that are also practically embeddable on superconducting qubits.



[1] N. Baspin, A. Krishna, Physical Review Letters, 2022

[2] S. Bravyi, D. Poulin, B. Terhal, Physical Review Letters, 2010