Evaluation of waveform sampling ASICs for the ADAPT Prototype of the Advanced Particle-astrophysics Telescope (APT)
ORAL
Abstract
The Advanced Particle-astrophysics Telescope (APT) is a next-generation observatory being designed for multi-messenger astrophysics, particularly focused on the rapid detection and localization of transient events such as gamma-ray bursts, but also providing new capabilities for dark matter detection and studies of cosmic rays.
APT’s balloon-borne prototype, the Antarctic Demonstrator for APT (ADAPT), is currently under development as a small-scale platform to validate key technologies.
ADAPT consists of multiple detector modules, each incorporating multi-channel systems using silicon photomultipliers (SiPMs) and silicon strip detectors. Most SiPM signals are continuously recorded as analog waveforms via switched-capacitor sample-and-hold circuits, configured as ring buffers for real-time data acquisition. A critical component of ADAPT is the use of waveform sampling ASICs, combining analog buffering and analog-to-digital conversion for 16 or 32 channels per chip. Here, low power consumption and achieving a longer readout time window to capture a wider range of triggers is prioritized over maximising the sampling rate, while still capturing a full signal waveform.
In this contribution, we will report on the test results of the HD-SoC ASIC configured for ADAPT, as well as the ALPHA ASIC designed at UH Manoa. We will discuss the performance characteristics, timing behavior, and signal integrity of both chips, assessing their readiness for deployment in the upcoming Antarctic balloon mission.
APT’s balloon-borne prototype, the Antarctic Demonstrator for APT (ADAPT), is currently under development as a small-scale platform to validate key technologies.
ADAPT consists of multiple detector modules, each incorporating multi-channel systems using silicon photomultipliers (SiPMs) and silicon strip detectors. Most SiPM signals are continuously recorded as analog waveforms via switched-capacitor sample-and-hold circuits, configured as ring buffers for real-time data acquisition. A critical component of ADAPT is the use of waveform sampling ASICs, combining analog buffering and analog-to-digital conversion for 16 or 32 channels per chip. Here, low power consumption and achieving a longer readout time window to capture a wider range of triggers is prioritized over maximising the sampling rate, while still capturing a full signal waveform.
In this contribution, we will report on the test results of the HD-SoC ASIC configured for ADAPT, as well as the ALPHA ASIC designed at UH Manoa. We will discuss the performance characteristics, timing behavior, and signal integrity of both chips, assessing their readiness for deployment in the upcoming Antarctic balloon mission.
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Presenters
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Jennifer Ott
- University of Hawaii at Manoa