Unlocking high performance in quantum computing using error-suppression

Noise and decoherence are major obstacles to quantum computing performance. Using current-generation devices, direct executions of algorithmic circuits typically lose useful signal at relatively small volumes. Achieving higher performance on cloud-available hardware is possible, but requires complementary application of several error-suppression techniques.

In this talk we highlight recent progress in error-suppression methodology from our group, with particular attention to the combined effect of a unified and automated error-suppression pipeline. We demonstrate highly efficient and scalable layout selection, and low-depth approximate unitary synthesis routines. We describe characterization and circuit-level correction of coherent gate errors, as well as circuit-aware and error-aware embedding of dynamical decoupling to fully eliminate crosstalk errors. Each of these methods is independently applied; however, we demonstrate that together they unlock significantly higher performance compared to direct hardware execution.