Ultrafast Field-Effect Transistor Based on Wet-Transfer Assisted Monolayer WS₂/MoS₂ Heterostructure

A novel groundbreaking approach to enhancing next-generation electronics is introduced through a high-performance field-effect transistor (FET) by leveraging a vertically stacked monolayer WS₂/MoS₂ heterostructure. Following the assembly of large-area CVD-grown monolayers on a Si/SiO₂ substrate, studied the electrical and optoelectronic behavior of ultrafast back-gated FET. Vertical stacking was verified by Raman spectroscopy and spatial mapping, followed by XPS and KPFM to resolve the heterointerface and surface potential, thereby linking structural assembly to electronic function. Photoluminescence quenching revealed Type-II band alignment, crucial for device performance as it enables efficient spatial charge separation. Surface morphology and topography were assessed using SEM and AFM. Nanoscale electrical characterization via Conductive-AFM and SCM successfully correlated structural defects to local electronic properties. The fabricated back-gated FET exhibited superior I-V characteristics, demonstrating significantly enhanced field-effect mobility 25 cm² V⁻¹ s⁻¹ and a high ON/OFF current ratio of >10³ compared to their constituent monolayer counterparts. Subthreshold swing achieved a competitive value of 100 mV/dec, indicating efficient switching for a transition metal dichalcogenides (TMD) device on a SiO₂ dielectric. This performance enhancement is directly attributed to the effective spatial charge transfer inherent to the optimal band alignment, which creates a high-quality, confined conduction channel. This work underscores the immense potential of transforming ultrafast field-effect transistors into high-performance non-volatile memory devices that promise to enhance data retention, speed, and energy efficiency in future electronics.

Keywords: Monolayer WS₂/MoS₂, Heterostructure, FET, Transition Metal Dichalcogenides